SoC-TM: integrated HW/SW support for transactional memory programming on embedded MPSoCs

Two overriding concerns in the development of embedded MPSoCs are ease of programming and hardware complexity. In this paper we present SoC-TM, an integrated HW/SW solution for transactional programming on embedded MPSoCs. Our proposal leverages a Hardware Transactional Memory (HTM) design, based on a dedicated HW module for conflict management, whose functionality is exposed to the software through compiler directives, implemented as an extension to the popular OpenMP programming model. To further improve ease of programming, our framework supports speculative parallelism, thanks to the ability of enforcing a given commit order in hardware. Our experimental results confirm that SoC-TM is a viable and cost-effective solution for embedded MPSoCs, in terms of energy, performance and productivity. Categories and Subject Descriptors B.3.2 [Memory Structures]: Design Styles—Cache Mem

• Type: Journal
• Year: 2011
• Where: CODES
• Authors: Cesare Ferri, Andrea Marongiu, Benjamin Lipton, R. Iris Bahar, Tali Moreshet, Luca Benini, Maurice Herlihy
• Keywords: CODES 2011, Hardware Complexity, Openmp Programming, Productivity Categories, Software Engineering