Software-Based Cache Coherence with Hardware-Assisted Selective Self-Invalidations Using Bloom Filters

— Implementing shared memory consistency models on top of hardware caches gives rise to the well-known cache coherence problem. The standard solution involves implementing coherence protocols in hardware, an approach with some design complexity, hardware costs, and restrictions on interconnect behavior. However, for some memory consistency models, an alternative is to enforce coherence in the software implementation of synchronization primitives, using software controlled invalidations and forced writebacks. This requires minimal hardware support but gives less selective enforcement, which affects performance. This paper proposes a novel hybrid software-hardware coherence mechanism. In this scheme software is responsible for triggering the coherence actions – self-invalidations and writebacks – at appropriate times while hardware uses Bloom filters to perform more selective self-invalidations. We evaluate the proposed scheme on applications from two different domains: the SPLASH...

• Type: Journal
• Year: 2011
• Where: TC
• Authors: Thomas J. Ashby, Pedro Diaz, Marcelo Cintra
• Keywords: Hardware, Memory Consistency Models, Software Engineering, TC 2011, Well-known Cache Coherence