Specification Enforcing Refinement for Convertibility Verification

Protocol conversion deals with the automatic synthesis of an additional component, often referred to as an adaptor or a converter, to bridge mismatches between interacting components, often referred to as protocols. A formal solution, called convertibility verification, has been recently proposed, which produces such a converter, so that the parallel composition of the protocols and the converter also satisfies some desired specification. A converter is responsible for bridging different kinds of mismatches such as control, data, and clock mismatches. Mismatches are usually removed by the converter by disabling undesirable paths in the protocol composition (similar to controllers in supervisory control of Discrete Event Systems (DES)). We generalize this convertibility verification problem by using a new refinement called specification enforcing refinement (SER) between a protocol composition and a desired specification. The existence of such a refinement is shown to be a necessary an...

• Type: Conference
• Year: 2009
• Where: ACSD
• Authors: Partha S. Roop, Alain Girault, Roopak Sinha, Gregor Goessler
• Keywords: ACSD 2009, Convertibility Verification, Hardware, Protocol Composition, Undesirable Paths