— Stability analysis of high-order delta-sigma loops is a challenge. In this brief, a sufficient design criterion is presented for highorder multibit error-feedback DACs which are especially suitable for high-speed operation. This analytical criterion might be too conservative, but it allows the design of stable, robust, and high-resolution deltasigma DACs. Both analytical and numerical analysis are performed for verification. Also, experimental results of a discrete-component multiplier-free prototype demonstrate 10-bit operation at a very low oversampling ratio of 4.