StageNet: A Reconfigurable Fabric for Constructing Dependable CMPs

—CMOS scaling has long been a source of dramatic performance gains. However, semiconductor feature size reduction has resulted in increasing levels of operating temperatures and current densities. Given that most wearout mechanisms are highly dependent on these parameters, significantly higher failure rates are projected for future technology generations. Consequently, fault tolerance, which has traditionally been a subject of interest for high-end server markets, is now getting emphasis in the mainstream computing systems space. The popular solution for this has been the use of redundancy at a coarse granularity, such as dual/triple modular redundancy. In this work, we challenge the practice of coarse-granularity redundancy by identifying its inability to scale to high failure rate scenarios and investigating the advantages of finer-grained configurations. To this end, this paper presents and evaluates a highly reconfigurable CMP architecture, named as StageNet (SN), that is designe...

• Type: Journal
• Year: 2011
• Where: TC
• Authors: Shantanu Gupta, Shuguang Feng, Amin Ansari, Scott A. Mahlke
• Keywords: Dramatic Performance Gains, Failure Rate, Reconfigurable Cmp Architecture, Software Engineering, TC 2011