Sub-Microwatt Analog VLSI Support Vector Machine for Pattern Classification and Sequence Estimation

An analog system-on-chip for kernel-based pattern classification and sequence estimation is presented. State transition probabilities conditioned on input data are generated by an integrated support vector machine. Dot product based kernels and support vector coefficients are implemented in analog programmable floating gate translinear circuits, and probabilities are propagated and normalized using sub-threshold current-mode circuits. A 14-input, 24-state, and 720-support vector forward decoding kernel machine is integrated on a 3mm

• Type: Conference
• Year: 2004
• Where: NIPS
• Authors: Shantanu Chakrabartty, Gert Cauwenberghs
• Keywords: NIPS 2004, NIPS 2007, Sequence Estimation, Support Vector, Support Vector Machine