Sub-threshold design: the challenges of minimizing circuit energy

In this paper, we identify the key challenges that oppose subthreshold circuit design and describe fabricated chips that verify techniques for overcoming the challenges. Categories and Subject Descriptors B.7.1 [ICs]: Types and Design Styles General Terms Performance, Design, Reliability Keywords Sub-threshold digital circuits, low voltage memory, dynamic voltage scaling, process variations, sub-threshold logic

• Type: Conference
• Year: 2006
• Where: ISLPED
• Authors: Benton H. Calhoun, Alice Wang, Naveen Verma, Anantha Chandrakasan
• Keywords: Dynamic Voltage Scaling, ISLPED 2006, Low Voltage Memory, Subthreshold Circuit Design