Subterranean: A 600 Mbit/Sec Cryptographic VLSI Chip

In this paper the design of a high-speed cryptographic coprocessor is presented. This coprocessor is named Subterranean and can be used for both cryptographic pseudorandom sequence generation (Substream) and cryptographic hashing (Subhash). In Substream mode the chip can be used for stream encryption/decryption under control of a 256-bit key. A cryptographic resynchronization mechanism is provided for fast accessibility of encrypted data by legitimate parties. Application fields include the real-time encryption of digital HDTV signals as well as high speed telecommunication and networking such as ATM. The chip has been fabricated within the INVOMEC / EUROCHIP educational VLSI Design Facilities in MIETEC 2.4µ CMOS technology. Measured samples are operating at encryption / decryption rates of 286 Mbits/sec and hashing rates of 572 Mbits/sec. The operation of the chip is demonstrated by a setup showing the real-time encryption and decryption of digitized PAL color composite video signa...

• Type: Conference
• Year: 1993
• Where: ICCD
• Authors: Luc J. M. Claesen, Joan Daemen, Mark Genoe, G. Peeters
• Keywords: Cryptographic, Cryptographic Pseudorandom Sequence, Cryptographic Resynchronization Mechanism, Hardware, ICCD 1993