SyCERS: a SystemC Design Exploration Framework for SoC Reconfigurable Architecture

Reconfigurable devices, such as FPGAs, introduce into the design workflow of embedded systems a new degree of freedom: the designer can have the system autonomously modify the functionality carried out by the IP-Core according to the application's changing needs while it runs. Increasing the complexity of the design provides to the designers much more flexibility in their decisions but imply that the time to market of the final solution is dramatically increasing to. This paper presents a design methodology for dynamically reconfigurable IP-core based architectures. The methodology is based on the SystemC class library and targets the design of reconfigurable architectures for embedded systems. The use of the SystemC library enables the designer to specify a system in its hardware and software parts with just one language.

• Type: Conference
• Year: 2006
• Where: ERSA
• Authors: Carlo Amicucci, Fabrizio Ferrandi, Marco D. Santambrogio, Donatella Sciuto
• Keywords: Application's Changing Needs, Embedded Systems, ERSA 2006, ERSA 2007, Reconfigurable Devices