System-level communication modeling for network-on-chip synthesis

— As we are entering the network-on-chip era and system communication is becoming a dominating factor, comon abstraction and synthesis are becoming the integral part of system design flows. The key to the success of any deow are well-defined abstraction levels and models, which enable automation of early validation, synthesis and verification. paper, we define system communication abstraction layers and corresponding design models that support successive, stepwise refinement from abstract message-passing down to a cycleaccurate, bus-functional implementation. Experimental results show the benefits of our definitions and design flow.

• Type: Conference
• Year: 2005
• Where: ASPDAC
• Authors: Andreas Gerstlauer, Dongwan Shin, Rainer Dömer, Daniel D. Gajski
• Keywords: Abstraction, ASPDAC 2005, Communication Abstraction Layers, Well-defined Abstraction Levels