A variation-aware low-power coding methodology for tightly coupled buses

- This paper describes a novel low-power coding methodology for buses. Ultra deep submicron technology and system-on-chip have resulted in a considerable portion of power consumption on buses, in which the major sources of the power consumption are the transition activities on the signal lines and the coupling capacitances of the lines. In addition, we enter an era of considering variation of the effective coupling capacitances. We address power reduction including these phenomena by using variable length coding. Experimental results show the effectiveness of our methodology.

• Type: Conference
• Year: 2005
• Where: ASPDAC
• Authors: Masanori Muroyama, Kosuke Tarumi, Koji Makiyama, Hiroto Yasuura
• Keywords: ASPDAC 2005, Coupling Capacitances, Hardware, Low-power Coding Methodology, Power Consumption