WIP Evolution of a Semiconductor Factory after a Bottleneck Workcenter Breakdown

In semiconductor fabrication facilities, it can be observed an increase in work in progress (WIP) even weeks after the failure of the bottleneck workcenter. In this paper, we develop a simple fab model that facilitates the study of this phenomenon. The simpli ed factory consists of a detailed model of the bottleneck workcenter and a delay unit that represents the rest of factory. After passing the delay unit the lots are fed back to the bottleneck to model the cyclic ow of lots of real wafer fabs. We study the behavior of this model for numerous scenarios. It turns out that by means of the model the WIP increase phenomenon can successfully be reproduced. In addition, we provide rst results on how to avoid the unwanted increase in inventory. 

• Type: Conference
• Year: 1998
• Where: WSC
• Authors: Oliver Rose
• Keywords: Bottleneck Workcenter, Delay Unit, Model, Modeling And Simulation, WSC 1998