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ISCAS
2008
IEEE

Wireless neural signal acquisition with single low-power integrated circuit

14 years 6 months ago
Wireless neural signal acquisition with single low-power integrated circuit
—We present experimental results from an integrated circuit designed for wireless neural recording applications. The chip, which was fabricated in a 0.6-µm 2P3M BiCMOS process, contains 100 amplifiers and a 10-bit ADC and 902-928 MHz FSK transmitter. Neural signals from one amplifier are sampled by the ADC at 15.7 kSps and telemetered over the FSK wireless data link. Power, clock, and command signals are sent to the chip wirelessly over a 2.765-MHz inductive (coil-to-coil) link. The chip is capable of operating with only two off-chip components: a power receive coil and a 100-nF capacitor.
Reid R. Harrison, Ryan J. Kier, Bradley Greger, Fl
Added 31 May 2010
Updated 31 May 2010
Type Conference
Year 2008
Where ISCAS
Authors Reid R. Harrison, Ryan J. Kier, Bradley Greger, Florian Solzbacher, Cynthia A. Chestek, Vikash Gilja, Paul Nuyujukian, Stephen I. Ryu, Krishna V. Shenoy
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