Yield-driven iterative robust circuit optimization algorithm

This paper proposes an equation-based multi-scenario iterative robust optimization methodology for analog/mixed-signal circuits. We show that due to local circuit performance monotonicity in random variations constraint maximization can be used to efficiently find critical constraints and worst-case scenarios of random process variations and populate them into a multi-scenario optimization. This algorithm scales gracefully with circuit size and is tested on both two-stage and fully differential folded-cascode operational amplifiers with a 90 nm predictive model. The improving yield-trends are confirmed across process and random variations with Hspice Monte-Carlo simulations. Categories and Subject Descriptors B.7.2 [Integrated Circuits]: Design Aids General Terms Algorithms Keywords Robust Circuit Optimization, Variability, Yield, Analog Circuits

• Type: Conference
• Year: 2009
• Where: DAC
• Authors: Yan Li, Vladimir Stojanovic
• Keywords: Computer Architecture, DAC 2009, Iterative Robust Optimization, Random Process Variations, Random Variations