1404 search results - page 128 / 281 » A C to Hardware Software Compiler |
154
click to vote
PEPM
2004
ACM
15 years 9 months ago
2004
ACM
The use of partial evaluation for specializing programs written in imperative languages such as C and Java is hampered by the difficulty of controlling the specialization process....
143
click to vote
IEEEPACT
2007
IEEE
15 years 10 months ago
2007
IEEE
With the advent of chip-multiprocessors, we are faced with the challenge of parallelizing performance-critical software. Transactional memory (TM) has emerged as a promising progr...
124
click to vote
SOSP
1997
ACM
15 years 5 months ago
1997
ACM
Low-latency remote-write networks, such as DEC’s Memory Channel, provide the possibility of transparent, inexpensive, large-scale shared-memory parallel computing on clusters of...
146
click to vote
ICS
1999
Tsinghua U.
15 years 8 months ago
1999
Tsinghua U.
—This paper explores the use of compiler optimizations which optimize the layout of instructions in memory. The target is to enable the code to make better use of the underlying ...
113
Voted
IEEEPACT
2007
IEEE
15 years 10 months ago
2007
IEEE
In recent years, microprocessor manufacturers have shifted their focus from single-core to multi-core processors. To avoid burdening programmers with the responsibility of paralle...