Sciweavers

1404 search results - page 221 / 281
» A C to Hardware Software Compiler
Sort
View
VEE
2009
ACM
146views Virtualization» more  VEE 2009»
16 years 8 days ago
Demystifying magic: high-level low-level programming
r of high-level languages lies in their abstraction over hardware and software complexity, leading to greater security, better reliability, and lower development costs. However, o...
Daniel Frampton, Stephen M. Blackburn, Perry Cheng...
TVLSI
2008
187views more  TVLSI 2008»
15 years 5 months ago
A Design Flow for Architecture Exploration and Implementation of Partially Reconfigurable Processors
During the last years, the growing application complexity, design, and mask costs have compelled embedded system designers to increasingly consider partially reconfigurable applica...
Kingshuk Karuri, Anupam Chattopadhyay, Xiaolin Che...
ASPLOS
2009
ACM
16 years 6 months ago
Capo: a software-hardware interface for practical deterministic multiprocessor replay
While deterministic replay of parallel programs is a powerful technique, current proposals have shortcomings. Specifically, software-based replay systems have high overheads on mu...
Pablo Montesinos, Matthew Hicks, Samuel T. King, J...
ECBS
1996
IEEE
93views Hardware» more  ECBS 1996»
15 years 9 months ago
A Methodology for Designing and Dimensioning Critical Complex Computing Systems
It is widely recognized that real-time,fault-tolerant and distributed computing technologies play a key role in the deployment of many current andfuture (civilian or Defense) crit...
Gérard Le Lann
CODES
2008
IEEE
15 years 12 months ago
Distributed flit-buffer flow control for networks-on-chip
The combination of flit-buffer flow control methods and latency-insensitive protocols is an effective solution for networks-on-chip (NoC). Since they both rely on backpressure...
Nicola Concer, Michele Petracca, Luca P. Carloni