1404 search results - page 41 / 281 » A C to Hardware Software Compiler |
IFIP
2010
Springer
13 years 4 months ago
2010
Springer
In this paper we present a novel two-stage method to realize a lightweight but very capable hardware implementation of a Learning Classifier System for on-chip learning. Learning C...
DRM
2004
Springer
14 years 3 months ago
2004
Springer
Recently, there is a growing interest in the research community to use tamper-resistant processors for software copy protection. Many of these tamper-resistant systems rely on a s...
SP
2003
IEEE
14 years 3 months ago
2003
IEEE
We specify a hardware architecture that supports tamper-resistant software by identifying an “idealized” hich gives the abstracted actions available to a single user program. ...
CODES
2010
IEEE
13 years 8 months ago
2010
IEEE
The last years have shown that there is no way to disregard the advantages provided by multiprocessor System-on-Chip (MPSoC) architectures in the embedded systems domain. Using mu...
TRUST
2009
Springer
14 years 4 months ago
2009
Springer
During many crises, access to sensitive emergency-support information is required to save lives and property. For example, for effective evacuations first responders need the name...