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KBSE
2005
IEEE
14 years 1 months ago
Automated test generation for engineering applications
In test generation based on model-checking, white-box test criteria are represented as trap conditions written in a temporal logic. A model checker is used to refute trap conditio...
Songtao Xia, Ben Di Vito, César Muño...
CAV
1998
Springer
175views Hardware» more  CAV 1998»
13 years 12 months ago
An ACL2 Proof of Write Invalidate Cache Coherence
As a pedagogical exercise in ACL2, we formalize and prove the correctness of a write invalidate cache scheme. In our formalization, an arbitrary number of processors, each with its...
J. Strother Moore
CC
2011
Springer
270views System Software» more  CC 2011»
12 years 11 months ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
SAS
2010
Springer
140views Formal Methods» more  SAS 2010»
13 years 6 months ago
Multi-dimensional Rankings, Program Termination, and Complexity Bounds of Flowchart Programs
Abstract. Proving the termination of a flowchart program can be done by exhibiting a ranking function, i.e., a function from the program states to a wellfounded set, which strictl...
Christophe Alias, Alain Darte, Paul Feautrier, Lau...
SMA
2003
ACM
138views Solid Modeling» more  SMA 2003»
14 years 27 days ago
Associativity between feature models across domains
Associativity between feature models implies the automatic updating of different feature models of a part after changes are made in one of its feature models. This is an importan...
S. Subramani, Balan Gurumoorthy