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DSD
2008
IEEE
124views Hardware» more  DSD 2008»
14 years 3 months ago
A Modular Approach to Model Heterogeneous MPSoC at Cycle Level
This paper proposes a system-level cycle-based framework to model and design heterogeneous Multiprocessor Systems on-Chip (MPSoC), called GRAPES. The approach features flexibilit...
Matteo Monchiero, Gianluca Palermo, Cristina Silva...
ICCSA
2007
Springer
14 years 2 months ago
FRASH: Hierarchical File System for FRAM and Flash
Abstract. In this work, we develop novel file system, FRASH, for byteaddressable NVRAM (FRAM[1]) and NAND Flash device. Byte addressable NVRAM and NAND Flash is typified by the DRA...
Eun-ki Kim, Hyungjong Shin, Byung-gil Jeon, Seokhe...
SOSP
2009
ACM
14 years 5 months ago
The multikernel: a new OS architecture for scalable multicore systems
Commodity computer systems contain more and more processor cores and exhibit increasingly diverse architectural tradeoffs, including memory hierarchies, interconnects, instructio...
Andrew Baumann, Paul Barham, Pierre-Évarist...
ACSD
2005
IEEE
71views Hardware» more  ACSD 2005»
14 years 2 months ago
Two-Phase Distributed Observation Problems
We introduce and study problems of distributed observation with bounded or unbounded memory. We are given a system modeled as a finite-word language L over some finite alphabet ...
Stavros Tripakis
LCTRTS
2010
Springer
14 years 3 months ago
Design exploration and automatic generation of MPSoC platform TLMs from Kahn Process Network applications
With increasingly more complex Multi-Processor Systems on Chip (MPSoC) and shortening time-to- market projections, Transaction Level Modeling and Platform Aware Design are seen as...
Ines Viskic, Lochi Lo Chi Yu Lo, Daniel Gajski