334 search results - page 50 / 67 » A Case for Deconstructing Hardware Transactional Memory Syst... |
ECRTS
2009
IEEE
13 years 6 months ago
2009
IEEE
While hardware caches are generally effective at improving application performance, they greatly complicate performance prediction. Slight changes in memory layout or data access p...
VEE
2005
ACM
14 years 2 months ago
2005
ACM
Modern transactional response-time sensitive applications have run into practical limits on the size of garbage collected heaps. The heap can only grow until GC pauses exceed the ...
TCAD
2008
13 years 8 months ago
2008
Abstract--Thermal issues are fast becoming major design constraints in high-performance systems. Temperature variations adversely affect system reliability and prompt worst-case de...
CODES
2006
IEEE
14 years 2 months ago
2006
IEEE
Time-critical multi-processor systems require guaranteed services in terms of throughput, bandwidth etc. in order to comply to hard real-time constraints. However, guaranteedservi...
EH
2004
IEEE
14 years 10 days ago
2004
IEEE
The use of Application Specific Instruction-set Processors (ASIP) in embedded systems is a solution to the problem of increasing complexity in the functions these systems have to ...