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MICRO
2010
IEEE
156views Hardware» more  MICRO 2010»
13 years 6 months ago
Explicit Communication and Synchronization in SARC
SARC merges cache controller and network interface functions by relying on a single hardware primitive: each access checks the tag and the state of the addressed line for possible...
Manolis Katevenis, Vassilis Papaefstathiou, Stamat...
HPCS
2006
IEEE
14 years 1 months ago
Toward a Software Infrastructure for the Cyclops-64 Cellular Architecture
This paper presents the initial design of the Cyclops-64 (C64) system software infrastructure and tools under development as a joint effort between IBM T.J. Watson Research Center...
Juan del Cuvillo, Weirong Zhu, Ziang Hu, Guang R. ...
BMCBI
2006
179views more  BMCBI 2006»
13 years 7 months ago
Multiscale Hy3S: Hybrid stochastic simulation for supercomputers
Background: Stochastic simulation has become a useful tool to both study natural biological systems and design new synthetic ones. By capturing the intrinsic molecular fluctuation...
Howard Salis, Vassilios Sotiropoulos, Yiannis N. K...
IPPS
2009
IEEE
14 years 2 months ago
Implementing and evaluating multithreaded triad census algorithms on the Cray XMT
Commonly represented as directed graphs, social networks depict relationships and behaviors among social entities such as people, groups, and organizations. Social network analysi...
George Chin Jr., Andrès Márquez, Sut...
IPPS
2007
IEEE
14 years 1 months ago
Determining the Minimum Energy Consumption using Dynamic Voltage and Frequency Scaling
While improving raw performance is of primary interest to most users of high-performance computers, energy consumption also is a critical concern. Some microprocessors allow volta...
Min Yeol Lim, Vincent W. Freeh