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» A Component Architecture for FPGA-Based, DSP System Design
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ICS
2003
Tsinghua U.
14 years 2 months ago
AEGIS: architecture for tamper-evident and tamper-resistant processing
We describe the architecture for a single-chip aegis processor which can be used to build computing systems secure against both physical and software attacks. Our architecture ass...
G. Edward Suh, Dwaine E. Clarke, Blaise Gassend, M...
SBCCI
2006
ACM
139views VLSI» more  SBCCI 2006»
14 years 2 months ago
Infrastructure for dynamic reconfigurable systems: choices and trade-offs
Platform-based design is a method to implement complex SoCs, avoiding chip design from scratch. A promising evolution of platform-based design are MPSoC. Such generic architecture...
Leandro Möller, Rafael Soares, Ewerson Carval...
CAD
2004
Springer
13 years 8 months ago
A concurrent engineering-oriented design database representation model
A concurrent engineering-oriented design database representation model (CE-DDRM) is introduced in this research for supporting various life-cycle aspects in concurrent design. In ...
Deyi Xue, Haoguang Yang
IFM
2004
Springer
125views Formal Methods» more  IFM 2004»
14 years 2 months ago
Formally Justifying User-Centred Design Rules: A Case Study on Post-completion Errors
Abstract. Interactive systems combine a human operator with a computer. Either may be a source of error. The veri cation processes used must ensure both the correctness of the comp...
Paul Curzon, Ann Blandford
IADIS
2003
13 years 10 months ago
Towards a Distributed Information Architecture for Avionics Data
Avionics data at the National Aeronautics and Space Administration’s (NASA) Jet Propulsion Laboratory (JPL) consists of distributed, unmanaged, and heterogeneous information tha...
Chris Mattmann, Dana Freeborn, Daniel J. Crichton