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» A Component Architecture for FPGA-Based, DSP System Design
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DATE
2010
IEEE
169views Hardware» more  DATE 2010»
14 years 1 months ago
Design space exploration of a mesochronous link for cost-effective and flexible GALS NOCs
There is today little doubt on the fact that a high-performance and cost-effective Network-on-Chip can only be designed in 45nm and beyond under a relaxed synchronization assumpti...
Daniele Ludovici, Alessandro Strano, Georgi Nedelt...
VLSID
2004
IEEE
292views VLSI» more  VLSID 2004»
14 years 9 months ago
NoCGEN: A Template Based Reuse Methodology for Networks on Chip Architecture
In this paper, we describe NoCGEN, a Network On Chip (NoC) generator, which is used to create a simulatable and synthesizable NoC description. NoCGEN uses a set of modularised rou...
Jeremy Chan, Sri Parameswaran
COOPIS
1997
IEEE
14 years 12 days ago
Design and Implementation of a Distributed Workflow Enactment Service
Workflows are activities involving the coordinated execution of multiple tasks performed by different processing entities, mostly in distributed heterogeneous environments which a...
Esin Gokkoca, Mehmet Altinel, Ibrahim Cingil, Nesi...
EURODAC
1994
IEEE
163views VHDL» more  EURODAC 1994»
14 years 29 days ago
VHDL and cyclic corrector codes
Cyclic corrector codes, or "block codes", are often used in telecommunications systems. To facilitate the design of coding/decoding circuits using this type of code, we ...
France Mendez
ICEBE
2009
IEEE
147views Business» more  ICEBE 2009»
14 years 3 months ago
The Design and Implementation of Service Reservations in Real-Time SOA
—Service-oriented architecture (SOA) provides the flexibility of dynamically composing business processes in enterprise computing. However, they must be enhanced to support real...
Mark Panahi, Weiran Nie, Kwei-Jay Lin