ed Abstract: Purpose of this paper Software Product Line (SPL) is at the forefront among the techniques for reducing costs, decreasing schedule time, and ensuring commonality of fe...
Luiz Fernando Capretz, Faheem Ahmed, Shereef Al-Ma...
Digital technology is increasingly deployed in safety-critical situations. This calls for systematic design and verification methodologies that can cope with three major sources o...
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
Emerging architectures such as partially reconfigurable FPGAs provide a huge potential for adaptivity in the area of embedded systems. Since many system functions are only execute...
Message Sequence Charts (MSCs) are widely used for describing interaction scenarios between the components of a distributed system. Consequently, worst-case response time estimati...