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MICRO
1998
IEEE
89views Hardware» more  MICRO 1998»
13 years 11 months ago
Load Latency Tolerance in Dynamically Scheduled Processors
This paper provides quantitative measurements of load latency tolerance in a dynamically scheduled processor. To determine the latency tolerance of each memory load operation, our...
Srikanth T. Srinivasan, Alvin R. Lebeck
ICPADS
2010
IEEE
13 years 5 months ago
Data-Aware Task Scheduling on Multi-accelerator Based Platforms
To fully tap into the potential of heterogeneous machines composed of multicore processors and multiple accelerators, simple offloading approaches in which the main trunk of the ap...
Cédric Augonnet, Jérôme Clet-O...
RTAS
2006
IEEE
14 years 1 months ago
Impact of Upper Layer Adaptation on End-to-end Delay Management in Wireless Ad Hoc Networks
A good amount of research has been developed to support QoS issues in IEEE 802.11 ad hoc networks, such as QoS routing, MAC layer QoS support, and cross-layer QoS design. However,...
Wenbo He, Klara Nahrstedt
FPL
2006
Springer
111views Hardware» more  FPL 2006»
13 years 11 months ago
A Simulation Platform for Reconfigurable Computing Research
In this paper, we present a full-system reconfigurable computing simulation platform intended to promote innovative new research in reconfigurable computing. Currently, reconfigur...
Wenyin Fu, Katherine Compton
IPPS
2010
IEEE
13 years 5 months ago
Dynamic load balancing on single- and multi-GPU systems
The computational power provided by many-core graphics processing units (GPUs) has been exploited in many applications. The programming techniques currently employed on these GPUs...
Long Chen, Oreste Villa, Sriram Krishnamoorthy, Gu...