Sciweavers

1098 search results - page 195 / 220
» A Cost-Effective Clustered Architecture
Sort
View
DUX
2007
13 years 11 months ago
180 x 120: designing alternate location systems
Using 180 RFID tags to track and plot locations over time, guests to an event at the San Francisco Museum of Modern Art (SFMOMA) collectively constructed a public visualization of...
Eric Paulos, Anthony Burke, Tom Jenkins, Karen Mar...
HOTOS
2009
IEEE
13 years 11 months ago
FlashVM: Revisiting the Virtual Memory Hierarchy
Flash memory is the largest change to storage in recent history. To date, most research has focused on integrating flash as persistent storage in file systems, with little emphasi...
Mohit Saxena, Michael M. Swift
PACS
2000
Springer
99views Hardware» more  PACS 2000»
13 years 11 months ago
Dynamically Reconfiguring Processor Resources to Reduce Power Consumption in High-Performance Processors
Power dissipation is a major concern not only for portable systems, but also for high-performance systems. In the past, energy consumption and processor heating was reduced mainly...
Roberto Maro, Yu Bai, R. Iris Bahar
IPPS
1995
IEEE
13 years 11 months ago
Operating system support for concurrent remote task creation
This paper describes improvements to the Mach microkernel’s support for efficient application startup across multiple nodes in a cluster or massively parallel processor. Signifi...
Dejan S. Milojicic, David L. Black, Steven J. Sear...
ANNPR
2006
Springer
13 years 9 months ago
A Convolutional Neural Network Tolerant of Synaptic Faults for Low-Power Analog Hardware
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...
Johannes Fieres, Karlheinz Meier, Johannes Schemme...