1614 search results - page 128 / 323 » A Customizable Implementation of RMI for High Performance Co... |
134
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DAC
2000
ACM
15 years 7 months ago
2000
ACM
– This paper describes the system design and implementation of Active Basestations, a novel application of the run-time reconfigurable hardware technology whose applications have...
130
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ASPDAC
2005
ACM
15 years 5 months ago
2005
ACM
In this paper we propose a fault-tolerant processor architecture and an associated fault-tolerant computation model capable of fault tolerance in the nanoelectronic environment th...
127
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SICHERHEIT
2008
15 years 4 months ago
2008
Abstract: The NTRU encryption scheme is an interesting alternative to well-established encryption schemes such as RSA, ElGamal, and ECIES. The security of NTRU relies on the hardne...
134
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IPPS
2000
IEEE
15 years 7 months ago
2000
IEEE
Effective utilization of cache memories is a key factor in achieving high performance in computing the Discrete Fourier Transform (DFT). Most optimizationtechniques for computing ...
120
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WMPI
2004
ACM
15 years 8 months ago
2004
ACM
This paper discusses die cost vs. performance tradeoffs for a PIM system that could serve as the memory system of a host processor. For an increase of less than twice the cost of ...