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IPPS
2007
IEEE
14 years 2 months ago
Performance Analysis of a Family of WHT Algorithms
This paper explores the correlation of instruction counts and cache misses to runtime performance for a large family of divide and conquer algorithms to compute the Walsh–Hadama...
Michael Andrews, Jeremy Johnson
ICS
2000
Tsinghua U.
13 years 11 months ago
Improving parallel system performance by changing the arrangement of the network links
The Midimew network is an excellent contender for implementing the communication subsystem of a high performance computer. This network is an optimal 2D topology in the sense ther...
Valentin Puente, Cruz Izu, José A. Gregorio...
SIGCOMM
1996
ACM
14 years 5 days ago
Multicasting Protocols for High-Speed, Wormhole-Routing Local Area Networks
Wormhole routing LANs are emerging as an effective solution for high-bandwidth, low-latency interconnects in distributed computing and cluster computing applications. An important...
Mario Gerla, Prasasth Palnati, Simon Walton
CC
2011
Springer
270views System Software» more  CC 2011»
12 years 11 months ago
Subregion Analysis and Bounds Check Elimination for High Level Arrays
For decades, the design and implementation of arrays in programming languages has reflected a natural tension between productivity and performance. Recently introduced HPCS langua...
Mackale Joyner, Zoran Budimlic, Vivek Sarkar
PSB
2001
13 years 9 months ago
A Multithreaded Parallel Implementation of a Dynamic Programming Algorithm for Sequence Comparison
This paper discusses the issues involved in implementing a dynamic programming algorithm for biological sequence comparison on a generalpurpose parallel computing platform based o...
W. S. Martins, Juan del Cuvillo, F. J. Useche, Kev...