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ICCAD
2006
IEEE
111views Hardware» more  ICCAD 2006»
14 years 6 months ago
State re-encoding for peak current minimization
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
Shih-Hsu Huang, Chia-Ming Chang, Yow-Tyng Nieh
ICCAD
2004
IEEE
125views Hardware» more  ICCAD 2004»
14 years 6 months ago
Temporal floorplanning using the T-tree formulation
Improving logic capacity by time-sharing, dynamically reconfigurable FPGAs are employed to handle designs of high complexity and functionality. In this paper, we model each task ...
Ping-Hung Yuh, Chia-Lin Yang, Yao-Wen Chang
3DIC
2009
IEEE
184views Hardware» more  3DIC 2009»
14 years 4 months ago
Architectural evaluation of 3D stacked RRAM caches
The first memristor, originally theorized by Dr. Leon Chua in 1971, was identified by a team at HP Labs in 2008. This new fundamental circuit element is unique in that its resis...
Dean L. Lewis, HsienHsin S. Lee
TIME
2009
IEEE
14 years 4 months ago
Fixing the Semantics for Dynamic Controllability and Providing a More Practical Characterization of Dynamic Execution Strategies
Morris, Muscettola and Vidal (MMV) presented an algorithm for checking the dynamic controllability (DC) of temporal networks in which certain temporal durations are beyond the con...
Luke Hunsberger
ICEIS
2009
IEEE
14 years 4 months ago
Invisible Deployment of Integration Processes
Abstract. Due to the changing scope of data management towards the management of heterogeneous and distributed systems and applications, integration processes gain in importance. T...
Matthias Böhm, Dirk Habich, Wolfgang Lehner, ...