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» A Distributed Control Path Architecture for VLIW Processors
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CODES
2008
IEEE
14 years 3 months ago
Distributed and low-power synchronization architecture for embedded multiprocessors
In this paper we present a framework for a distributed and very low-cost implementation of synchronization controllers and protocols for embedded multiprocessors. The proposed arc...
Chenjie Yu, Peter Petrov
ICCAD
2006
IEEE
131views Hardware» more  ICCAD 2006»
14 years 5 months ago
High-level synthesis challenges and solutions for a dynamically reconfigurable processor
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Takao Toi, Noritsugu Nakamura, Yoshinosuke Kato, T...
RTAS
2009
IEEE
14 years 3 months ago
Power-Aware CPU Utilization Control for Distributed Real-Time Systems
CPU utilization control has recently been demonstrated to be an effective way of meeting end-to-end deadlines for distributed real-time systems running in unpredictable environmen...
Xiaorui Wang, Xing Fu, Xue Liu, Zonghua Gu
FPL
2001
Springer
102views Hardware» more  FPL 2001»
14 years 1 months ago
Technology Trends and Adaptive Computing
System and processor architectures depend on changes in technology. Looking ahead as die density and speed increase, power consumption and on chip interconnection delay become incr...
Michael J. Flynn, Albert A. Liddicoat
TON
1998
186views more  TON 1998»
13 years 8 months ago
Virtual path control for ATM networks with call level quality of service guarantees
— The configuration of virtual path (VP) connection services is expected to play an important role in the operation of large-scale asynchronous transfer mode (ATM) networks. A m...
Nikolaos Anerousis, Aurel A. Lazar