238 search results - page 22 / 48 » A Distributed Control Path Architecture for VLIW Processors |
IPPS
2006
IEEE
14 years 1 months ago
2006
IEEE
Digital Down Conversion (DDC) is an algorithm, used to lower the amount of samples per second by selecting a limited frequency band out of a stream of samples. A possible DDC algo...
FCCM
2004
IEEE
13 years 11 months ago
2004
IEEE
Dynamically Reconfigurable Processor (DRP)[1] developed by NEC Electronics is a coarse grain reconfigurable processor that selects a data path from the on-chip repository of sixte...
ISPAN
2000
IEEE
14 years 6 hour ago
2000
IEEE
We present new architectural concepts for uniprocessor designs that conform to the data-driven computation paradigm. Usage of our D2 -CPU (Data-Driven processor) follows the natura...
IPPS
2007
IEEE
14 years 1 months ago
2007
IEEE
Fine-grained multithreading based on a natural model, such as dataflow model, is promising in achieving high efficiency and high programming productivity. In this paper, we disc...
CASES
2005
ACM
13 years 9 months ago
2005
ACM
Instruction set customization accelerates the performance of applications by compressing the length of critical dependence paths and reducing the demands on processor resources. W...