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» A Distributed Performance Analysis Architecture for Clusters
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ICS
2009
Tsinghua U.
15 years 10 months ago
Dynamic cache clustering for chip multiprocessors
This paper proposes DCC (Dynamic Cache Clustering), a novel distributed cache management scheme for large-scale chip multiprocessors. Using DCC, a per-core cache cluster is compri...
Mohammad Hammoud, Sangyeun Cho, Rami G. Melhem
131
Voted
IPPS
2002
IEEE
15 years 9 months ago
Massively Parallel Solutions for Molecular Sequence Analysis
In this paper we present new approaches to high performance protein database scanning on two novel massively parallel architectures to gain supercomputer power at low cost. The ï¬...
Bertil Schmidt, Heiko Schröder, Manfred Schim...
154
Voted
IWCC
1999
IEEE
15 years 8 months ago
Single I/O Space for Scalable Cluster Computing
In this paper, we propose a novel Single I/O Space architecture for achieving a Single System Image (SSI) at the I/O subsystem level. This is very much desired in a scalable clust...
Roy S. C. Ho, Hai Jin, Kai Hwang
CLUSTER
2004
IEEE
15 years 7 months ago
On optimizing collective communication
In this paper we discuss issues related to the highperformance implementation of collective communications operations on distributed-memory computer architectures. Using a combina...
E. W. Chan, M. F. Heimlich, Avi Purkayastha, Rober...
ICCD
2004
IEEE
122views Hardware» more  ICCD 2004»
16 years 1 months ago
Linear Programming based Techniques for Synthesis of Network-on-Chip Architectures
Network-on-chip (NoC) has been proposed as a solution for the communication challenges of System-on-chip (SoC) design in the nanoscale regime. SoC design offers the opportunity fo...
Krishnan Srinivasan, Karam S. Chatha, Goran Konjev...