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IPPS
2003
IEEE
15 years 9 months ago
Performance and Overhead in a Hybrid Reconfigurable Computer
In this paper, we overview general hardware architecture and a programming model of SRC-6ETM reconfigurable computers, and compare the performance of the SRC-6E machine vs. Intel...
Osman Devrim Fidanci, Daniel S. Poznanovic, Kris G...
ICDCS
2002
IEEE
15 years 9 months ago
Accelerating Internet Streaming Media Delivery using Network-Aware Partial Caching
Internet streaming applications are affected by adverse network conditions such as high packet loss rates and long delays. This paper aims at mitigating such effects by leveraging...
Shudong Jin, Azer Bestavros, Arun Iyengar
SPAA
2010
ACM
15 years 9 months ago
Simplifying concurrent algorithms by exploiting hardware transactional memory
We explore the potential of hardware transactional memory (HTM) to improve concurrent algorithms. We illustrate a number of use cases in which HTM enables significantly simpler c...
Dave Dice, Yossi Lev, Virendra J. Marathe, Mark Mo...
ICS
1989
Tsinghua U.
15 years 8 months ago
Control flow optimization for supercomputer scalar processing
Control intensive scalar programs pose a very different challenge to highly pipelined supercomputers than vectorizable numeric applications. Function call/return and branch instru...
Pohua P. Chang, Wen-mei W. Hwu
HOTI
2008
IEEE
15 years 10 months ago
Constraint Repetition Inspection for Regular Expression on FPGA
— Recent network intrusion detection systems (NIDS) use regular expressions to represent suspicious or malicious character sequences in packet payloads in a more efficient way. ...
Miad Faezipour, Mehrdad Nourani