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» A Dynamic Multithreading Processor
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COMPUTER
2000
138views more  COMPUTER 2000»
13 years 8 months ago
Making Pointer-Based Data Structures Cache Conscious
Processor and memory technology trends portend a continual increase in the relative cost of accessing main memory. Machine designers have tried to mitigate the effect of this tren...
Trishul M. Chilimbi, Mark D. Hill, James R. Larus
JILP
2000
79views more  JILP 2000»
13 years 8 months ago
A Comparative Survey of Load Speculation Architectures
Load latency remains a signi cant bottleneck in dynamically scheduled pipelined processors. Load speculation techniques have been proposed to reduce this latency. Dependence Predi...
Brad Calder, Glenn Reinman
SIGMETRICS
1998
ACM
13 years 8 months ago
Scheduling with Implicit Information in Distributed Systems
Implicitcoscheduling is a distributed algorithm fortime-sharing communicating processes in a cluster of workstations. By observing and reacting to implicit information, local sche...
Andrea C. Arpaci-Dusseau, David E. Culler, Alan M....
IEEEHPCS
2010
13 years 7 months ago
Discovering closed frequent itemsets on multicore: Parallelizing computations and optimizing memory accesses
The problem of closed frequent itemset discovery is a fundamental problem of data mining, having applications in numerous domains. It is thus very important to have efficient par...
Benjamin Négrevergne, Alexandre Termier, Je...
JPDC
2010
106views more  JPDC 2010»
13 years 7 months ago
Feedback-directed page placement for ccNUMA via hardware-generated memory traces
Non-uniform memory architectures with cache coherence (ccNUMA) are becoming increasingly common, not just for large-scale high performance platforms but also in the context of mul...
Jaydeep Marathe, Vivek Thakkar, Frank Mueller