Most current techniques fail to achieve the dynamic update of recursive functions. A focus on execution states appears to be essential in order to implement dynamic update in this...
A dynamically reconfigurable processor (DRP) is designed to achieve high area efficiency by switching reconfigurable data paths dynamically. Our DRP architecture has a stand alone...
Conventional processors use a fully-associative store queue (SQ) to implement store-load forwarding. Associative search latency does not scale well to capacities and bandwidths re...
—Disk drives are a common performance bottleneck in modern storage systems. To alleviate this, disk manufacturers employ a variety of I/O request scheduling strategies which aim ...
Abigail S. Lebrecht, Nicholas J. Dingle, William J...
— Crossbars are main components of communication switches used to construct interconnection networks. Scheduling algorithm controls contention in switch architecture. Several sch...
Mihir V. Shah, Mehul C. Patel, Dinesh J. Sharma, A...