In this paper, we study the incremental t echnology mapping problem for lookup-table (LUT) based Field Programmable Gate Arrays (FPGAs) under incremental changes. Given a gate-lev...
To minimize the execution time of an iterative application in a heterogeneous parallel computing environment, an appropriate mapping scheme is needed for matching and scheduling th...
Yu-Kwong Kwok, Anthony A. Maciejewski, Howard Jay ...
An algorithm for mapping core terminals to System-On-a-Chip (SOC) I/O pins and scheduling tests in order to achieve costefficient concurrent test for core-based designs is present...
For generalized cylinders (GC) defined by contours of discrete curves, we propose two algorithms to generate GC surfaces (1) in polygonal meshes and (2) in cylindrical type of dev...
Spectral clustering has attracted much research interest in recent years since it can yield impressively good clustering results. Traditional spectral clustering algorithms first s...
Bo Chen, Bin Gao, Tie-Yan Liu, Yu-Fu Chen, Wei-Yin...