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» A Formal Logic Approach to Constrained Combinatorial Testing
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FAC
2008
97views more  FAC 2008»
13 years 7 months ago
A functional formalization of on chip communications
This paper presents a formal model and a systematic approach to the validation of communication tures at a high level of abstraction. This model is described mathematically by a fu...
Julien Schmaltz, Dominique Borrione
DFT
2006
IEEE
105views VLSI» more  DFT 2006»
14 years 1 months ago
Thermal-Aware SoC Test Scheduling with Test Set Partitioning and Interleaving
1 High temperature has become a major problem for system-on-chip testing. In order to reduce the test time while keeping the temperature of the chip under test within a safe range,...
Zhiyuan He, Zebo Peng, Petru Eles, Paul M. Rosinge...
PPDP
2010
Springer
13 years 5 months ago
A declarative approach to robust weighted Max-SAT
The presence of uncertainty in the real world makes robustness to be a desired property of solutions to constraint satisfaction problems. Roughly speaking, a solution is robust if...
Miquel Bofill, Dídac Busquets, Mateu Villar...
BMCBI
2004
138views more  BMCBI 2004»
13 years 7 months ago
Constraint Logic Programming approach to protein structure prediction
Background: The protein structure prediction problem is one of the most challenging problems in biological sciences. Many approaches have been proposed using database information ...
Alessandro Dal Palù, Agostino Dovier, Feder...
SAC
2010
ACM
14 years 2 months ago
Background knowledge in formal concept analysis: constraints via closure operators
The aim of this short paper is to present a general method of using background knowledge to impose constraints in conceptual clustering of object-attribute relational data. The pr...
Radim Belohlávek, Vilém Vychodil