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» A Formal Model of the Software Test Process
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MEMOCODE
2007
IEEE
14 years 3 months ago
Combining Multi-Valued Logics in SAT-based ATPG for Path Delay Faults
Due to the rapidly growing speed and the decreasing size of gates in modern chips, the probability of faults caused by the production process grows. Already small variations lead ...
Stephan Eggersglüß, Görschwin Fey,...
FMCAD
2007
Springer
14 years 1 months ago
Boosting Verification by Automatic Tuning of Decision Procedures
Parameterized heuristics abound in computer aided design and verification, and manual tuning of the respective parameters is difficult and time-consuming. Very recent results from ...
Frank Hutter, Domagoj Babic, Holger H. Hoos, Alan ...
ARCS
2010
Springer
14 years 16 days ago
A Hierarchical Distributed Control for Power and Performances Optimization of Embedded Systems
Power and resource management are key goals for the success of modern battery-supplied multimedia devices. This kind of devices are usually based on SoCs with a wide range of subsy...
Patrick Bellasi, William Fornaciari, David Siorpae...
ISSE
2007
13 years 9 months ago
Specifying real-time properties in autonomic systems
Increasingly, computer software must adapt dynamically to changing conditions. The correctness of adaptation cannot be rigorously addressed without precisely specifying the require...
Ji Zhang, Zhinan Zhou, Betty H. C. Cheng, Philip K...
ICSE
2011
IEEE-ACM
13 years 20 days ago
Predictable dynamic deployment of components in embedded systems
—Dynamic reconfiguration – the ability to hot swap a component, or to introduce a new component into the system – is essential to supporting evolutionary change in long-live ...
Ana Petricic