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CODES
2008
IEEE
14 years 5 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
CODES
2008
IEEE
14 years 5 months ago
Online adaptive utilization control for real-time embedded multiprocessor systems
To provide Quality of Service (QoS) guarantees in open and unpredictable environments, the utilization control problem is defined to keep the processor utilization at the schedula...
Jianguo Yao, Xue Liu, Mingxuan Yuan, Zonghua Gu
CODES
2008
IEEE
14 years 5 months ago
Static analysis of processor stall cycle aggregation
Processor Idle Cycle Aggregation (PICA) is a promising approach for low power execution of processors, in which small memory stalls are aggregated to create a large one, and the p...
Jongeun Lee, Aviral Shrivastava
GLOBECOM
2008
IEEE
14 years 5 months ago
Multi-Cluster Multi-Parent Wake-Up Scheduling in Delay-Sensitive Wireless Sensor Networks
—Immediate notification of urgent but rare events and delivery of time sensitive actuation commands appear in many practical wireless sensor and actuator network applications. M...
Huang Lee, Abtin Keshavarzian, Hamid K. Aghajan
ICASSP
2008
IEEE
14 years 5 months ago
Systematic generation of FPGA-based FFT implementations
In this paper, we propose a systemic approach for synthesizing field-programmable gate array (FPGA) implementations of fast Fourier transform (FFT) computations. Our approach cons...
Hojin Kee, Newton Petersen, Jacob Kornerup, Shuvra...