1998 search results - page 192 / 400 » A Hardware Implementation of PRAM and Its Performance Evalua... |
150
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MOBISYS
2005
ACM
16 years 5 months ago
2005
ACM
We present the design and implementation of the Horus WLAN location determination system. The design of the Horus system aims at satisfying two goals: high accuracy and low comput...
137
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IEEEPACT
2007
IEEE
16 years 16 days ago
2007
IEEE
We present a detailed characterization of instruction cache performance for IBM’s J2EE-enabled web server, WebSphere Application Server (WAS). When running two J2EE benchmarks o...
295
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ICFP
2009
ACM
16 years 6 months ago
2009
ACM
Concurrent ML (CML) is a high-level message-passing language that supports the construction of first-class synchronous abstractions called events. This mechanism has proven quite ...
308
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POPL
2002
ACM
16 years 6 months ago
2002
ACM
Some compilation systems, such as offline partial evaluators and selective dynamic compilation systems, support staged optimizations. A staged optimization is one where a logicall...
138
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GECCO
2007
Springer
2007
Springer
Optimising the flow of experiments to a robot scientist with multi-objective evolutionary algorithms
16 years 12 days ago
A Robot Scientist is a physically implemented system that applies artificial intelligence to autonomously discover new knowledge through cycles of scientific experimentation. Ad...