Sciweavers

1998 search results - page 27 / 400
» A Hardware Implementation of PRAM and Its Performance Evalua...
Sort
View
ICNP
2007
IEEE
16 years 8 days ago
A Performance Study of Loss Detection/Recovery in Real-world TCP Implementations
— TCP is the dominant transport protocol used in the Internet and its performance fundamentally governs the performance of Internet applications. It is well-known that packet los...
Sushant Rewaskar, Jasleen Kaur, F. Donelson Smith
MICRO
2006
IEEE
114views Hardware» more  MICRO 2006»
15 years 12 months ago
Authentication Control Point and Its Implications For Secure Processor Design
Secure processor architecture enables tamper-proof protection on software that addresses many difficult security problems such as reverse-engineering prevention, trusted computing...
Weidong Shi, Hsien-Hsin S. Lee
ISSS
2002
IEEE
124views Hardware» more  ISSS 2002»
15 years 11 months ago
A New Performance Evaluation Approach for System Level Design Space Exploration
Application specific systems have potential for customization of design with a view to achieve a better costperformance-power trade-off. Such customization requires extensive de...
M. Balakrishnan, Anshul Kumar, C. P. Joshi
CODES
1996
IEEE
15 years 10 months ago
Uninterpreted Co-Simulation for Performance Evaluation of Hw/Sw Systems
Performance modeling and evaluation of embedded hardware/software systems is important to help the CoDesign process. The hardware/software partitioning needs to be evaluated befor...
Jean Paul Calvez, Dominique Heller, Olivier Pasqui...
FPL
2009
Springer
172views Hardware» more  FPL 2009»
15 years 10 months ago
Performance comparison of single-precision SPICE Model-Evaluation on FPGA, GPU, Cell, and multi-core processors
Automated code generation and performance tuning techniques for concurrent architectures such as GPUs, Cell and FPGAs can provide integer factor speedups over multi-core processor...
Nachiket Kapre, André DeHon