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ICPP
1999
IEEE
14 years 23 days ago
Improving Performance of Load-Store Sequences for Transaction Processing Workloads on Multiprocessors
On-line transaction processing exhibits poor memory behavior in high-end multiprocessor servers because of complex sharing patterns and substantial interaction between the databas...
Jim Nilsson, Fredrik Dahlgren
PPOPP
1997
ACM
14 years 20 days ago
Performance Implications of Communication Mechanisms in All-Software Global Address Space Systems
Global addressing of shared data simplifies parallel programming and complements message passing models commonly found in distributed memory machines. A number of programming sys...
Beng-Hong Lim, Chi-Chao Chang, Grzegorz Czajkowski...
IPPS
1999
IEEE
14 years 23 days ago
NWCache: Optimizing Disk Accesses via an Optical Network/Write Cache Hybrid
In this paper we propose a simple extension to the I/O architecture of scalable multiprocessors that optimizes page swap-outs significantly. More specifically, we propose the use o...
Enrique V. Carrera, Ricardo Bianchini
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
11 years 11 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
SIGOPSE
2004
ACM
14 years 1 months ago
Scalable strong consistency for web applications
Web application workloads are often characterized by a large number of unique read requests and a significant fraction of write requests. Hosting these applications drives the ne...
Swaminathan Sivasubramanian, Guillaume Pierre, Maa...