The use of sub-optimal digital systems can at times lead to high speed, efficient, costeffective structures that are sufficient to perform needed tasks. We describe here a system ...
This paper describes Embra, a simulator for the processors, caches, and memory systems of uniprocessors and cache-coherent multiprocessors. When running as part of the SimOS simul...
The key problem to be faced when building a HMM-based continuous speech recogniser is maintaining the balance between model complexity and available training data. For large vocab...
We describe a programming framework for high performance clusters with various hardware accelerators. In this framework, users can utilize the available heterogeneous resources pr...
Kuen Hung Tsoi, Anson H. T. Tse, Peter Pietzuch, W...
Performance estimation of Multi-Processor System-On-Chip (MPa high abstraction level is required in order to perform early architecture exploration and accurate design validations...