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SC
1992
ACM
13 years 11 months ago
Compiler Code Transformations for Superscalar-Based High Performance Systems
Exploiting parallelism at both the multiprocessor level and the instruction level is an e ective means for supercomputers to achieve high-performance. The amount of instruction-le...
Scott A. Mahlke, William Y. Chen, John C. Gyllenha...
PDP
2011
IEEE
12 years 10 months ago
Energy-Aware Task Allocation for Network-on-Chip Based Heterogeneous Multiprocessor Systems
—Energy-efficiency is becoming one of the most critical issues in embedded system design. In Network-on-Chip (NoC) based heterogeneous Multiprocessor Systems, the energy consump...
Jia Huang, Christian Buckl, Andreas Raabe, Alois K...
CLUSTER
2005
IEEE
14 years 18 days ago
A Feasibility Analysis of Power Awareness in Commodity-Based High-Performance Clusters
We present a feasibility study of a power-reduction scheme that reduces the thermal power of processors by lowering frequency and voltage in the context of high-performance comput...
Chung-Hsing Hsu, Wu-chun Feng
IWCC
1999
IEEE
13 years 11 months ago
Nomad: A Scalable Operating System for Clusters of Uni and Multiprocessors
The recent improvements in workstation and interconnection network performance have popularized the clusters of off-the-shelf workstations. However, the usefulness of these cluste...
Eduardo Pinheiro, Ricardo Bianchini
ECBS
2006
IEEE
126views Hardware» more  ECBS 2006»
14 years 1 months ago
Experiments and Investigations for the Personal High Performance Computing (PHPC) built on top of the 64-bit processing and clus
The motivation and objective for this paper is to demonstrate “Personal High Performance Computing (PHPC)”, which requires only a smaller number of computers, resources and sp...
Victor Chang