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ICCD
1999
IEEE
122views Hardware» more  ICCD 1999»
14 years 2 months ago
Design and Evaluation of a Selective Compressed Memory System
This research explores any potential for an on-chip cache compression which can reduce not only cache miss ratio but also miss penalty, if main memory is also managed in compresse...
Jang-Soo Lee, Won-Kee Hong, Shin-Dug Kim
SIGMETRICS
2002
ACM
117views Hardware» more  SIGMETRICS 2002»
13 years 9 months ago
Context-aware TCP/IP
Abstract-This paper discusses the design and evaluation of CATNIP, a ContextAware Transport/Network Internet Protocol for the Web. This integrated protocol uses application-layer k...
Carey L. Williamson, Qian Wu
EMSOFT
2010
Springer
13 years 7 months ago
Energy-aware packet and task co-scheduling for embedded systems
A crucial objective in battery operated embedded systems is to work under the minimal power consumption that provides a desired level of performance. Dynamic Voltage Scaling (DVS)...
Luca Santinelli, Mauro Marinoni, Francesco Prosper...
GLOBECOM
2007
IEEE
14 years 4 months ago
Discovering Topologies at Router Level: Part II
—Measurement and monitoring of network topologies are essential tasks in current network scenarios. Indeed, due to their utility in planning, management, security, and reliabilit...
Alessio Botta, Walter de Donato, Antonio Pescap&eg...
IPOM
2005
Springer
14 years 3 months ago
Discovering Topologies at Router Level
—Measurement and monitoring of network topologies are essential tasks in current network scenarios. Indeed, due to their utility in planning, management, security, and reliabilit...
Donato Emma, Antonio Pescapè, Giorgio Ventr...