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FPGA
2000
ACM
168views FPGA» more  FPGA 2000»
13 years 11 months ago
A benchmark suite for evaluating configurable computing systems--status, reflections, and future directions
This paper presents a benchmark suite for evaluating a configurable computing system's infrastructure, both tools and architecture. A novel aspect of this work is the use of ...
S. Kumar, Luiz Pires, Subburajan Ponnuswamy, C. Na...
MSWIM
2009
ACM
14 years 2 months ago
A performance evaluation framework for fair solutions in ad hoc networks
Fairness in multihop ad hoc networks has received considerable attention in the literature. Many schemes have been proposed, which attempt to compute the “optimal” bit rates o...
Manos Dramitinos, Rémi Vannier, Isabelle Gu...
SDL
2003
147views Hardware» more  SDL 2003»
13 years 8 months ago
Modelling and Evaluation of a Network on Chip Architecture Using SDL
Network on Chip (NoC) is a new paradigm for designing large and complex systems on chips (SoCs). In this paradigm, a packet switched network is provided for on-chip communication. ...
Rickard Holsmark, Magnus Högberg, Shashi Kuma...
EUROMICRO
2009
IEEE
13 years 11 months ago
Synthetic Metrics for Evaluating Runtime Quality of Software Architectures with Complex Tradeoffs
Runtime quality of software, such as availability and throughput, depends on architectural factors and execution environment characteristics (e.g. CPU speed, network latency). Alth...
Anakreon Mentis, Panagiotis Katsaros, Lefteris Ang...
IPPS
1992
IEEE
13 years 11 months ago
CCHIME: A Cache Coherent Hybrid Interconnected Memory Extension
This paper presents a hybrid shared memory architecture which combines the scalability of a multistage interconnection network with the contention reduction benefits of coherent c...
Matthew K. Farrens, Arvin Park, Allison Woodruff