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SAMOS
2004
Springer
14 years 2 months ago
High-Speed Event-Driven RTL Compiled Simulation
In this paper we present a new approach for generating high-speed optimized event-driven register transfer level (RTL) compiled simulators. The generation of the simulators is part...
Alexey Kupriyanov, Frank Hannig, Jürgen Teich
CVPR
2007
IEEE
13 years 8 months ago
PrivacyCam: a Privacy Preserving Camera Using uCLinux on the Blackfin DSP
Considerable research work has been done in the area of surveillance and biometrics, where the goals have always been high performance, robustness in security and cost optimizatio...
Ankur Chattopadhyay, Terrance E. Boult
DAC
2007
ACM
14 years 9 months ago
Multiprocessor Resource Allocation for Throughput-Constrained Synchronous Dataflow Graphs
Abstract. Embedded multimedia systems often run multiple time-constrained applications simultaneously. These systems use multiprocessor systems-on-chip of which it must be guarante...
Sander Stuijk, Twan Basten, Marc Geilen, Henk Corp...
CASES
2009
ACM
14 years 3 months ago
CGRA express: accelerating execution using dynamic operation fusion
Coarse-grained reconfigurable architectures (CGRAs) present an appealing hardware platform by providing programmability with the potential for high computation throughput, scalab...
Yongjun Park, Hyunchul Park, Scott A. Mahlke
SAMOS
2007
Springer
14 years 2 months ago
An Interrupt Controller for FPGA-based Multiprocessors
— Interrupt-based programming is widely used for interfacing a processor with peripherals and allowing software threads to interact. Many hardware/software architectures have bee...
Antonino Tumeo, Marco Branca, Lorenzo Camerini, Ma...