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CODES
1996
IEEE
14 years 28 days ago
A Model for the Coanalysis of Hardware and Software Architectures
Successful """tiprocessor system design for complex realtime embedded applications requires powerful and comprehensive. yet cost-effective. productive. and maintain...
Fred Rose, Todd Carpenter, Sanjaya Kumar, John Sha...
SAMOS
2010
Springer
13 years 7 months ago
Interleaving granularity on high bandwidth memory architecture for CMPs
—Memory bandwidth has always been a critical factor for the performance of many data intensive applications. The increasing processor performance, and the advert of single chip m...
Felipe Cabarcas, Alejandro Rico, Yoav Etsion, Alex...
ISVLSI
2005
IEEE
169views VLSI» more  ISVLSI 2005»
14 years 2 months ago
High Performance Array Processor for Video Decoding
high NRE cost. Therefore, general purpose programmable processors using software to perform various functions become more attractive since programmability can simplify system devel...
J. Lee, Narayanan Vijaykrishnan, Mary Jane Irwin
ERSA
2007
113views Hardware» more  ERSA 2007»
13 years 10 months ago
Autonomous Computing Systems: A Proof-of-Concept
This paper describes a proof-of-concept implementation of a basic autonomous computing system. The system consists of an XUP Virtex-II Pro board running Linux and a set of softwar...
Neil Steiner, Peter M. Athanas
SAMOS
2004
Springer
14 years 2 months ago
Synchronous Transfer Architecture (STA)
This paper presents a novel micro-architecture for high-performance and low-power DSPs. The underlying Synchronous Transfer Architecture (STA) fills the gap between SIMD-DSPs and ...
Gordon Cichon, Pablo Robelly, Hendrik Seidel, Emil...