We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
Explaining how engineering devices work is important to students, engineers, and operators. In general, machine generated explanations have been produced from a particular perspec...
: paper we present a two-level approach to extend the abstract syntax of models with concrete semantics in order to execute such models. First, a light-weight execution infrastruct...
Christian Motika, Hauke Fuhrmann, Reinhard von Han...
SystemC is widely used for modeling and simulation in hardware/software co-design. Due to the lack of a complete formal semantics, it is not possible to verify SystemC designs. In...
Model checking is an automated technique for verifying that a system satisfies a set of required properties. Such properties are typically expressed as temporal logic formulas, in...