550 search results - page 67 / 110 » A Logic for Application Level QoS |
159
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DATE
2005
IEEE
15 years 11 months ago
2005
IEEE
— With increasing process fluctuations in nano-scale technology, testing for delay faults is becoming essential in manufacturing test to complement stuck-at-fault testing. Desig...
143
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ISLPED
2000
ACM
15 years 10 months ago
2000
ACM
In this paper we present a completely on-chip voltage regulation technique which promises to adjust the degree of voltage regulation in a digital logic chip in the face of process...
166
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CI
2004
15 years 5 months ago
2004
We present a general approach for representing and reasoning with sets of defaults in default logic, focussing on reasoning about preferences among sets of defaults. First, we con...
160
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ICCAD
1995
IEEE
15 years 9 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...
170
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WWW
2004
ACM
16 years 6 months ago
2004
ACM
Content delivery networks have evolved beyond traditional distributed caching. With services such as Akamai's EdgeComputing it is now possible to deploy and run enterprise bu...